NetBSD/openblocksに関するメーリングリスト

とくだです

NetBSD BoF では OBS50, OBS200, OBS266 の OBS シリーズを
披露させていただきました。あと USL-5P (landisk) と
Armadillo-9 (evbarm) の合計五台を持ち込んでみました。

NetBSD BoF では OBS 関係者がたくさんいらっしゃっていました。
細川さん、おおがいとさん、清原さん、深海さん。

> OBS200
> - emac 動かん
> -> phy は 0 番目を使わず 1 番目で

おおがいとさんがこのメーリングリストにパッチを送ったところ
添付ファイルで跳ねられてしまったとのことでした。

# もう一度送っていただくようにお願いしました。

> OBS266
> - NetBSD 3.0 以降 pthread 動かん (OBS200 も同じかも)
> -> fukaumi send-pr ランキング上位を狙え!

よろしくお願いします。

> - dmphy
> -> kiyohara さんよろしく (kern/29667)

8/25 に shige さんが "Enable dmphy, bridge." していますね。
てことで ukphy もなくなっていて急ぎの仕事になっちゃいましたか。

> - cardbus
> -> kiyohara さんよろしく

obs266 の下に入れるとか入れないとか。

--
とくだひろし

おおがいとです。
>> In Message
at Mon, 29 Aug 2005 05:09:25 +0900
Hiroshi TOKUDA wrote:

> おおがいとさんがこのメーリングリストにパッチを送ったところ
> 添付ファイルで跳ねられてしまったとのことでした。
>
> # もう一度送っていただくようにお願いしました。

とりあえず、今日の src tree で、single user mode まで
boot することは確認しました。
# emac の取り扱いは ad hoc です。


Index: arch/evbppc/conf/OPENBLOCKS200
===================================================================
RCS file: /cvsroot/NetBSD-cvs/main/src/sys/arch/evbppc/conf/OPENBLOCKS200,v
retrieving revision 1.6
diff -u -r1.6 OPENBLOCKS200
--- arch/evbppc/conf/OPENBLOCKS200 19 Aug 2005 05:19:50 -0000 1.6
+++ arch/evbppc/conf/OPENBLOCKS200 28 Aug 2005 13:00:11 -0000
@@ -150,12 +150,14 @@

gpiic0 at opb? addr ? irq ? # On-chip IIC controller
iic0 at gpiic? # I2C bus
+dsrtc* at iic0 addr 0x68

gpio0 at opb? addr ? irq ? # On-chip GPIO controller

pchb0 at plb? # PCI-Host bridges

pci* at pchb?
+pci* at ppb?
ppb* at pci? dev ? function ? # PCI-PCI bridges
pciide* at pci? dev ? function ? flags 0x0000 # GENERIC pciide driver
acardide* at pci? dev ? function ? # Acard IDE controllers
@@ -173,9 +175,8 @@
viaide* at pci? dev ? function ? # VIA/AMD/Nvidia IDE controllers
atabus* at ata?

-tlp* at pci? dev ? function ? # DECchip 21x4x and clones
-
-lxtphy* at mii? phy ? # Level One LXT-970 PHYs
+rtk0 at pci? dev ? function ? # Realtek 8129/8139
+tqphy* at mii? phy ? # TDK Semiconductor PHYs
ukphy* at mii? phy ? # generic unknown PHYs

#cardslot* at cbb?
@@ -199,6 +200,8 @@
sd* at atapibus? drive ? flags 0x0000 # ATAPI disk drives
uk* at atapibus? drive ? flags 0x0000 # ATAPI unknown

+#pbus* at plb? # off-chip Peripheral BUS
+
#pckbc0 at pbus?
#pckbd* at pckbc?
#wskbd* at pckbd? console ?
Index: arch/evbppc/conf/files.obs200
===================================================================
RCS file: /cvsroot/NetBSD-cvs/main/src/sys/arch/evbppc/conf/files.obs200,v
retrieving revision 1.1
diff -u -r1.1 files.obs200
--- arch/evbppc/conf/files.obs200 18 Mar 2005 15:31:58 -0000 1.1
+++ arch/evbppc/conf/files.obs200 29 Aug 2005 00:22:24 -0000
@@ -30,3 +30,30 @@
# Raster operations
include "dev/rasops/files.rasops"
include "dev/wsfont/files.wsfont"
+
+
+# Machine-independent I2O drivers.
+include "dev/i2o/files.i2o"
+
+# PCI bus support
+include "dev/pci/files.pci"
+
+# On-chip PCI bridge
+device pchb : pcibus
+attach pchb at plb
+file arch/powerpc/ibm4xx/pci/pchb.c pchb
+file arch/evbppc/obs405/obs200_pci_machdep.c pci # only diff
+file arch/powerpc/ibm4xx/dev/ibm405gp.c
+
+# On-chip IIC controller
+device gpiic: i2cbus, i2c_bitbang
+attach gpiic at opb
+file arch/powerpc/ibm4xx/dev/gpiic_opb.c gpiic
+
+# Real time clock support
+file arch/powerpc/ibm4xx/dev/rtc.c
+
+# Off-chip peripheral bus
+#device pbus {[addr=-1], [irq=-1]}
+#attach pbus at plb
+#file arch/evbppc/obs405/dev/pbus.c pbus
Index: arch/evbppc/conf/std.obs200
===================================================================
RCS file: /cvsroot/NetBSD-cvs/main/src/sys/arch/evbppc/conf/std.obs200,v
retrieving revision 1.1
diff -u -r1.1 std.obs200
--- arch/evbppc/conf/std.obs200 18 Mar 2005 15:31:58 -0000 1.1
+++ arch/evbppc/conf/std.obs200 18 Aug 2005 04:31:37 -0000
@@ -24,5 +24,5 @@
options SPILLSTK=1024

include "arch/powerpc/conf/files.ibm4xx"
-include "arch/powerpc/conf/files.ibm405gp"
+#include "arch/powerpc/conf/files.ibm405gp"
include "arch/evbppc/conf/files.obs200"
Index: arch/evbppc/include/obs200.h
===================================================================
RCS file: /cvsroot/NetBSD-cvs/main/src/sys/arch/evbppc/include/obs200.h,v
retrieving revision 1.1
diff -u -r1.1 obs200.h
--- arch/evbppc/include/obs200.h 18 Mar 2005 15:31:58 -0000 1.1
+++ arch/evbppc/include/obs200.h 18 Aug 2005 04:31:37 -0000
@@ -45,6 +45,12 @@
/* UART Clock */
#define OBS200_COM_FREQ (COM_FREQ * 4) /* UART CLK 7.3728 MHz */

+
+#define OBS200_ATACTL_ADDR (0x60000000)
+#define OBS200_ATACTL_SIZE (0x1000)
+#define OBS200_ATAREG_ADDR (0x70000000)
+#define OBS200_ATAREG_SIZE (0x1000)
+
/*
* extern variables and functions
*/
Index: arch/evbppc/obs405/obs200_machdep.c
===================================================================
RCS file: /cvsroot/NetBSD-cvs/main/src/sys/arch/evbppc/obs405/obs200_machdep.c,v
retrieving revision 1.1
diff -u -r1.1 obs200_machdep.c
--- arch/evbppc/obs405/obs200_machdep.c 18 Mar 2005 15:31:58 -0000 1.1
+++ arch/evbppc/obs405/obs200_machdep.c 18 Aug 2005 04:31:37 -0000
@@ -94,6 +94,8 @@

#include "ksyms.h"

+#define THACK
+
/*
* Global variables used here and there
*/
@@ -114,6 +116,7 @@
{
u_int32_t pllmode;
u_int32_t psr;
+ u_int32_t tmp;
u_int memsize;

/* Disable all external interrupts */
@@ -165,6 +168,30 @@
if (boothowto & RB_KDB)
ipkdb_connect(0);
#endif
+
+#ifdef THACK
+ {
+ volatile u_int16_t *cmdsts = (volatile u_int16_t *)((uint)0x70000000);
+ volatile u_int16_t *base = (volatile u_int16_t *)((uint)0x60000000);
+ int counter;
+ tmp = mfdcr(DCR_CPC0_CR1);
+ printf("mfdcr(DCR_CPC0_CR1) = %x\n", tmp);
+ mtdcr(DCR_CPC0_CR1, (tmp | 0x4000));
+ delay(5000);
+ *cmdsts = 0x0001;
+ delay(5000);
+ *cmdsts = 0x0002;
+ delay(5000);
+ *cmdsts = 0x4000;
+ for (counter = 0; counter < 100; ++counter) {
+ u_int16_t stat;
+ delay(10000);
+ stat = *(base + 7);
+ if ( (stat & 0x8000) == 0)
+ break;
+ }
+ }
+#endif
}

void
Index: arch/evbppc/obs405/obs200_pci_machdep.c
===================================================================
RCS file: arch/evbppc/obs405/obs200_pci_machdep.c
diff -N arch/evbppc/obs405/obs200_pci_machdep.c
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ arch/evbppc/obs405/obs200_pci_machdep.c 9 Jun 2005 11:20:17 -0000
@@ -0,0 +1,279 @@
+/* $NetBSD: pci_machdep.c,v 1.4 2003/07/29 08:18:03 scw Exp $ */
+/* $Tera: pci_machdep.c,v 1.3 2003/12/25 12:09:07 tacha Exp $ */
+
+/*
+ * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
+ * Copyright (c) 1994 Charles M. Hannum. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Charles M. Hannum.
+ * 4. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Machine-specific functions for PCI autoconfiguration.
+ *
+ * On PCs, there are two methods of generating PCI configuration cycles.
+ * We try to detect the appropriate mechanism for this machine and set
+ * up a few function pointers to access the correct method directly.
+ *
+ * The configuration method can be hard-coded in the config file by
+ * using `options PCI_CONF_MODE=N', where `N' is the configuration mode
+ * as defined section 3.6.4.1, `Generating Configuration Cycles'.
+ */
+
+#include
+__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.4 2003/07/29 08:18:03 scw Exp $");
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+static struct powerpc_bus_space pci_iot = {
+ _BUS_SPACE_LITTLE_ENDIAN | _BUS_SPACE_MEM_TYPE,
+ 0x00000000,
+ IBM405GP_PCIC0_BASE, /* extent base */
+ IBM405GP_PCIC0_BASE + 8, /* extent limit */
+};
+
+static bus_space_handle_t pci_ioh;
+
+void
+pci_machdep_init(void)
+{
+
+ if (pci_ioh == 0 &&
+ (bus_space_init(&pci_iot, "pcicfg", NULL, 0) ||
+ bus_space_map(&pci_iot, IBM405GP_PCIC0_BASE, 8, 0, &pci_ioh)))
+ panic("Cannot map PCI registers");
+}
+
+void
+pci_attach_hook(struct device *parent, struct device *self,
+ struct pcibus_attach_args *pba)
+{
+
+#ifdef PCI_CONFIGURE_VERBOSE
+ printf("pci_attach_hook\n");
+ ibm4xx_show_pci_map();
+#endif
+ ibm4xx_setup_pci();
+#ifdef PCI_CONFIGURE_VERBOSE
+ ibm4xx_show_pci_map();
+#endif
+}
+
+int
+pci_bus_maxdevs(pci_chipset_tag_t pc, int busno)
+{
+
+ /*
+ * Bus number is irrelevant. Configuration Mechanism 1 is in
+ * use, can have devices 0-32 (i.e. the `normal' range).
+ */
+ return 32;
+}
+
+pcitag_t
+pci_make_tag(pci_chipset_tag_t pc, int bus, int device, int function)
+{
+ pcitag_t tag;
+
+ if (bus >= 256 || device >= 32 || function >= 8)
+ panic("pci_make_tag: bad request");
+
+ /* XXX magic number */
+ tag = 0x80000000 | (bus << 16) | (device << 11) | (function << 8);
+
+ return tag;
+}
+
+void
+pci_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp, int *fp)
+{
+
+ if (bp != NULL)
+ *bp = (tag >> 16) & 0xff;
+ if (dp != NULL)
+ *dp = (tag >> 11) & 0x1f;
+ if (fp != NULL)
+ *fp = (tag >> 8) & 0x07;
+}
+
+pcireg_t
+pci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
+{
+ pcireg_t data;
+
+ /* 405GT BIOS disables interrupts here. Should we? --Art */
+ bus_space_write_4(&pci_iot, pci_ioh, PCIC_CFGADDR, tag | reg);
+ data = bus_space_read_4(&pci_iot, pci_ioh, PCIC_CFGDATA);
+ /* 405GP pass2 errata #6 */
+ bus_space_write_4(&pci_iot, pci_ioh, PCIC_CFGADDR, 0);
+ return data;
+}
+
+void
+pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t data)
+{
+
+ bus_space_write_4(&pci_iot, pci_ioh, PCIC_CFGADDR, tag | reg);
+ bus_space_write_4(&pci_iot, pci_ioh, PCIC_CFGDATA, data);
+ /* 405GP pass2 errata #6 */
+ bus_space_write_4(&pci_iot, pci_ioh, PCIC_CFGADDR, 0);
+}
+
+
+int
+pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
+{
+ int pin = pa->pa_intrpin;
+ int dev = pa->pa_device;
+
+ if (pin == 0) {
+ /* No IRQ used. */
+ goto bad;
+ }
+
+ if (pin > 4) {
+ printf("pci_intr_map: bad interrupt pin %d\n", pin);
+ goto bad;
+ }
+
+ /*
+ * We need to map the interrupt pin to the interrupt bit in the UIC
+ * associated with it. This is highly machine-dependent.
+ */
+ switch(dev) {
+ case 7:
+ *ihp = 28;
+ break;
+ case 8:
+ *ihp = 26;
+ break;
+ case 9:
+ *ihp = 27;
+ break;
+ default:
+ printf("Hmm.. PCI device %d should not exist on this board\n",
+ dev);
+ goto bad;
+ }
+ return 0;
+
+bad:
+ *ihp = -1;
+ return 1;
+}
+
+const char *
+pci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih)
+{
+ static char irqstr[8]; /* 4 + 2 + NUL + sanity */
+
+ if (ih == 0 || ih >= ICU_LEN)
+ panic("pci_intr_string: bogus handle 0x%x", ih);
+
+ sprintf(irqstr, "irq %d", ih);
+ return (irqstr);
+
+}
+
+const struct evcnt *
+pci_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih)
+{
+
+ /* XXX for now, no evcnt parent reported */
+ return NULL;
+}
+
+void *
+pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level,
+ int (*func)(void *), void *arg)
+{
+
+ if (ih == 0 || ih >= ICU_LEN)
+ panic("pci_intr_establish: bogus handle 0x%x", ih);
+
+ return intr_establish(ih, IST_LEVEL, level, func, arg);
+}
+
+void
+pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie)
+{
+
+ intr_disestablish(cookie);
+}
+
+void
+pci_conf_interrupt(pci_chipset_tag_t pc, int bus, int dev, int pin,
+ int swiz, int *iline)
+{
+
+ switch(dev) {
+ case 7:
+ *iline = 28;
+ break;
+ case 8:
+ *iline = 26;
+ break;
+ case 9:
+ *iline = 27;
+ break;
+ default:
+ *iline = 20 + ((swiz + dev + 1) & 3);
+ printf("*iline = %d\n", *iline);
+ panic("pci_conf_interrupt: bus = %d dev = %d pin = %d swiz = %d\n", bus, dev, pin, swiz);
+ }
+}
+
+/* Avoid overconfiguration */
+int
+pci_conf_hook(pci_chipset_tag_t pc, int bus, int dev, int func, pcireg_t id)
+{
+
+ if ((PCI_VENDOR(id) == PCI_VENDOR_IBM && PCI_PRODUCT(id) == PCI_PRODUCT_IBM_405GP) ||
+ (PCI_VENDOR(id) == PCI_VENDOR_INTEL && PCI_PRODUCT(id) == PCI_PRODUCT_INTEL_80960_RP)) {
+ /* Don't configure the bridge and PCI probe. */
+ return 0;
+ }
+ return PCI_CONF_ALL & ~PCI_CONF_MAP_ROM;
+}
Index: arch/powerpc/ibm4xx/dev/if_emac.c
===================================================================
RCS file: /cvsroot/NetBSD-cvs/main/src/sys/arch/powerpc/ibm4xx/dev/if_emac.c,v
retrieving revision 1.22
diff -u -r1.22 if_emac.c
--- arch/powerpc/ibm4xx/dev/if_emac.c 30 Jan 2005 19:03:23 -0000 1.22
+++ arch/powerpc/ibm4xx/dev/if_emac.c 18 Aug 2005 04:31:37 -0000
@@ -417,8 +417,12 @@

ifmedia_init(&mii->mii_media, 0, emac_mediachange,
emac_mediastatus);
+#ifndef __obs200__
mii_attach(&sc->sc_dev, mii, 0xffffffff,
MII_PHY_ANY, MII_OFFSET_ANY, 0);
+#else
+ mii_attach(&sc->sc_dev, mii, 0xffffffff, 1, MII_OFFSET_ANY, 0);
+#endif
if (LIST_FIRST(&mii->mii_phys) == NULL) {
ifmedia_add(&mii->mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_NONE);

とくだです

At Mon, 29 Aug 2005 21:54:18 +0900 (JST),
Tatoku Ogaito wrote:

> # emac の取り扱いは ad hoc です。

emac がうまく動かない件について、おおがいとさんから PHY が
なぜか二つ attach されるという話をうかがっていました。

試してみると確かに次のようになります。

emac0 at opb0 addr 0xef600800 irq 9: 405GP EMAC
emac0: interrupting at irqs 9 .. 15
emac0: Ethernet address 00:80:6d:51:0e:7d
ukphy0 at emac0 phy 0: Generic IEEE 802.3u media interface
ukphy0: 78Q2120 10/100 media interface (OUI 0x00039c, model 0x0014), rev. 11
ukphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
ukphy1 at emac0 phy 1: Generic IEEE 802.3u media interface
ukphy1: 78Q2120 10/100 media interface (OUI 0x00039c, model 0x0014), rev. 11
ukphy1: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto

で、config をみると phy に値が渡せるので次のようなパッチを
当てて明示的に phy を 0 に指定してみました。

--- sys/arch/evbppc/conf/OPENBLOCKS200.orig 2005-10-06 14:51:34.000000000 +0000
+++ sys/arch/evbppc/conf/OPENBLOCKS200 2005-10-06 15:08:41.000000000 +0000
@@ -173,10 +173,9 @@
viaide* at pci? dev ? function ? # VIA/AMD/Nvidia IDE controllers
atabus* at ata?

-tlp* at pci? dev ? function ? # DECchip 21x4x and clones
+rtk* at pci? dev ? function ? # Realtek 8129/8139

-lxtphy* at mii? phy ? # Level One LXT-970 PHYs
-ukphy* at mii? phy ? # generic unknown PHYs
+tqphy* at mii? phy 0 # TDK Semiconductor PHYs

#cardslot* at cbb?
#cardbus* at cardslot?

これだとうまく PHY をひとつだけ attach するみたいです。通信
の不具合も起こりません。

emac0 at opb0 addr 0xef600800 irq 9: 405GP EMAC
emac0: interrupting at irqs 9 .. 15
emac0: Ethernet address 00:80:6d:51:0e:7d
tqphy0 at emac0 phy 0: 78Q2120 10/100 media interface, rev. 11
tqphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
OUI 0x00039c model 0x0014 rev 11 at emac0 phy 1 not configured

まぁ、最後の行が美しくないのですが、if_emac.c に機種毎の条件
分岐を入れるよりもよさそうだと思ったのですがどうでしょうか?

変でなければ tlp -> rtk の件も含めて send-pr したいです。

--
とくだひろし

おおがいとです。

>> In Message
at Thu, 06 Oct 2005 15:23:19 +0000
Hiroshi TOKUDA wrote:

> で、config をみると phy に値が渡せるので次のようなパッチを
> 当てて明示的に phy を 0 に指定してみました。
...
> これだとうまく PHY をひとつだけ attach するみたいです。通信
> の不具合も起こりません。

はい、これならうまく行くと思います。
# ukphy を残すとそこに match してしまうのですが....

> まぁ、最後の行が美しくないのですが、if_emac.c に機種毎の条件
> 分岐を入れるよりもよさそうだと思ったのですがどうでしょうか?

ある程度の割り切りは必要だと思うので、良いと思います。

Tacha

とくだです

ずいぶん時間がたってしまいました。

At Sun, 09 Oct 2005 21:38:09 +0900 (JST),
Tatoku Ogaito wrote:

> はい、これならうまく行くと思います。
> # ukphy を残すとそこに match してしまうのですが....

ukphy について使わないから外せば良い、と思っていたのですが
rtk は ukphy なので外すわけにもいかないことにしばらくして
気づきました。

ということを日記に色々書いていたら、私信をいただき、色々と
教えてもらった結果、次のようにすれば emac, rtk を有効に
できました。

--- sys/arch/evbppc/conf/OPENBLOCKS200.orig 2005-10-06 14:51:34.000000000 +0000
+++ sys/arch/evbppc/conf/OPENBLOCKS200 2005-10-22 11:05:13.000000000 +0000
@@ -173,10 +173,10 @@
viaide* at pci? dev ? function ? # VIA/AMD/Nvidia IDE controllers
atabus* at ata?

-tlp* at pci? dev ? function ? # DECchip 21x4x and clones
+rtk* at pci? dev ? function ? # Realtek 8129/8139

-lxtphy* at mii? phy ? # Level One LXT-970 PHYs
-ukphy* at mii? phy ? # generic unknown PHYs
+tqphy* at emac? phy 1 # TDK Semiconductor PHYs
+ukphy* at rtk? phy ? # generic unknown PHYs

#cardslot* at cbb?
#cardbus* at cardslot?

本質的には tqphy で PHY が二つ attach されるのが問題で、
これを解決する必要がありますね。

sys/dev/mii/tqphyreg.h を見ると初期の tqphy にはバグがあって
そのバグの症状にモロにがいとうしているわけですが、OBS200 の
tqphy は rev から判断するとバグ解消済みのはずなのですが...

http://www.tokuda.net/diary/200510a.html#0703
http://www.tokuda.net/diary/200510a.html#0903
http://www.tokuda.net/diary/200510c.html#2203

tqphy の偉い人に任せるとして、とりあえず OBS200 の問題として
send-pr する方向で考えたいと思います (だめ?)。

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とくだひろし